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PM8393 SMC
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Symbols/Footprints
Features
GENERAL
The PM8393 SMC is a highly integrated MIPS-based processor with a set of built-in peripherals: internal memory, 4 Two-wire Interfaces (TWI), 4 Universal Asynchronous Receiver/Transmitters (UART), General Purpose I/O (GPIO), Fibre Channel Port, 8 Fan Control Ports, and expansion ports for additional memory and I/O expansion. The device is optimized for storage system applications. A complete suite of firmware development tools and application programming interfaces are available to enable quick development of SCSI Enclosure Services (SES) or custom enclosure management applications. INTEGRATED PROCESSOR
- MIPS32™ instruction set including 16e compressed instruction set for minimizing code space size.
- 106.25 MHz.
- 32-bit architecture with 5 Stage pipeline.
- Thirty-two 32-bit General Purpose Registers (GPR).
- Fixed mapping translation table.
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- Extra set of shadow GPRs for improved interrupt processing latency.
- Separate 16 KB 4-way set associative instruction and data caches to support execution out of external slow memory.
- EJTAG debug interface supports single stepping, on-chip memory access, instruction and data breakpoints.
- 128 KB on-chip scratch RAM for local code and data storage.
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FIBRE CHANNEL PORT INTERFACE
- Directly interfaces to CTS 20x4G parallel FC port.
- Provides termination of FC Arbitrated Loop (FC2) into on chip Tx and Rx FIFO.
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- Supports inband code download via FC link and SES protocol.
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LOCAL BUS INTERFACE
- Supports external I/O devices, RAM and Flash Memory.
- 4 programmable chip selects.
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- 8/16-bit data bus with 21 bit address space for a total of 2 MB per chip select.
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SERIAL INTERFACE
- 4 multi-master two wire interfaces.
- 4 Universal Asynchronous Receiver Transmitter (UART) interfaces.
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- 8 Fan PWM/Tachometer interfaces.
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GENERAL PURPOSE INPUT/OUTPUT (GPIO)
- Total of 128 individually programmable I/O pins.
- Each I/O may operate as an input,push/pull output or open-drain output configuration.
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- Programmable LED flash patterns.
- Configurable LED activity pattern based on external activity trigger.
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TIMER AND INTERRUPT
- Watchdog timer which resets processor upon timeout.
- 4 general purpose 32-bit timers for generating hardware timed events and interrupts.
- 4 external maskable, edge or level sensitive interrupt pins.
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- Four 32-bit counters for generating patterns on select GPIOs.
- 25 internal maskable interrupt signals for UART, TWI, FC PORT, GPIO, and Timer generated interrupts.
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FIRMWARE DEVELOPMENT KIT
- SES API for utilizing SES pages and commands over the FC link.
- SCSI-3 API for underlying access to the FC Port.
- API for downloading firmware over the FC link.
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- CTS Diagnostic API for FC link access to CTS registers and diagnostic capability.
- Peripheral Drivers: TWI, UART, GPIO, LED.
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Physical
- Built in 0.18 µm (1.8 V Core and 3.3 V I/O supply) CMOS technology .
- GPIOs are 5 V tolerant.
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- 23 mm x 23 mm 324-pin PBGA.
- 800 mW typical operating power.
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Applications
- Fibre Channel Storage Systems (RAID, SBOD, MBOD, JBOD).
- SAS Storage Systems (RAID, SBOD,MBOD, JBOD).
- SATA Storage Systems (RAID, SBOD,MBOD, JBOD).
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- Server Storage.
- SAN Switches.
- Tape Storage.
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PMC-2052559 
