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PM8371 PBC 10x2G
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Features
- Supports 10 Fibre Channel Physical Interfaces at 1.0625 or 2.125 Gbit/s per Fibre Channel - Physical Interface (FC-PI).
- Supports Arbitrated Loop configuration and Star configuration.
- Each port is independently selectable to perform retimer, reclocker or bypass-path function.
- Non-blocking crossconnect supports configuring the ports into arbitrary sized zones or loops.
- Automatic selection of retimer, reclocker or bypass-path function to minimize latency and jitter when a disk is bypassed.
- The star configuration can be formed by programming the device to act as a 10-port retimer using the non-blocking crossconnect.
- Per-port receive monitoring for loss of signal, error rate, link level violations and disk errors.
- Per port monitoring and diagnostics:
- Loop Port State Machine monitors on each port for disk diagnostics and isolation.
- Configurable Digital Loss of Link: analog LOS Detect, 8B/10B disparity errors/error rate, CRC errors/error rate, word synchronization error/error rate, and compliant frequency of comma patterns detected (configurable thresholds for each with corresponding pin interrupts).
Supports single-ended or differential 106.25 MHz reference clock REFCLK.
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- Requires no external components to interface the high-speed signals to optics, coax, or serial backplanes. This results in minimum board footprint and greatly improved signal integrity.
- High-speed outputs with selectable pre-emphasis per port to counteract dielectric losses and allow maximum reach on printed circuit boards.
- Receive input equalization for improved signal integrity.
- Programmable output current that directly drives 50 Ω lines.
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- Compatible with optional 2-pin serial management interface using the selectable two-wire industry standard interface or MDC/MDIO protocol for configuration and diagnostic access.
- For normal mode of operation, a microprocessor interface is not required.
- Digital Loss of Link (DLOL) detect output for monitoring individual or multiple links. DLOL can be programmed to indicate excessive error rate, loss of synchronization, loss of signal, or excessive data run length.
- Interrupt output to flag changes in bypass state and DLOL error conditions.
- Supports built-in self-test (BIST) via internal Fibre Channel pattern generation and checking.
- External control pins can be overwritten by registers.
- • Supports internal serial loopback modes for each port for testing and debugging.
- Provides a standard 5 signal IEEE 1149.1 JTAG test port for boundary scan board purpose.
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- Ultra-low operating power of 4 W typical with all 10 channels active at 2.125 Gbit/s.
- 0.18 µ CMOS, 1.8 V supply.
- Small 23 mm x 23 mm footprint, 228-pin BGA with 1 mm ball pitch.
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Applications
- RAID Storage Systems.
- JBOD Storage Systems.
- MBOD Storage Systems.
- SBOD Storage Systems.
- Fibre Channel Hubs.
- FC-AL Nodes.
- 1.0625/2.125 Gbit/s Backplanes.
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