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PM8323 TEMAP 28FDL
High Density T1/E1 Framer with Integrated VT/TU Mappers and M13 Mux
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Features
The PM8323 TEMAP 28FDL is a high density T1/E1 framer with
integrated VT/TU mappers and an M13 multiplexer. This feature-rich
device is ideally suited for applications performing high-density
transport or termination of channelized DS3 or unchannelized DS3, E3,
T1, or E1 over existing SONET/SDH facilities.
- Processes 28 T1s/21 E1s or an STS-1/STM-0.
- Integrates SONET/SDH and DS3/E3 functionality as well as 28 T1/21
E1 bidirectional PMON-capable transceivers.
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- SONET/SDH functions include high order path processing, low
order path processing, T1/E1 to VT/TU mapping, and DS3/E3 to
AU-3/TU-3 mapping
- DS3/E3 functions include a DS3/E3 bidirectional PMON-capable
transceiver and an M13 multiplexer
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- Line side interfaces include:
- A 77.76 MHz byte wide parallel TelecomBus supporting an
STS-12/STM-4.
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- Two Working and two Protect 622 MHz serial TelecomBus
interfaces supporting a full STS-12/STM-4 of traffic.
- One serial DS3/E3/EC-1 link.
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- System side interface is a 19.44 MHz or 77.76 MHz byte serial SBI TR
bus used to connect T1/E1 line interface units.
- Provides an input and output STS-1 level cross-connect to groom
incoming and outgoing data streams.
- Provides a serial interface for extracting and inserting the low order
path and the high order path.
- Supports bit asynchronous mapping of T1/E1 tributaries into
SONET/SDH.
- Generates and terminates Low Order Path overhead (V5, J2, Z6, Z7
bytes).
- Provides Full Duplex performance monitoring for T1, E1, DS3, and E3
tributaries provided for add and drop directions.
- Supports inband error reporting by updating the REI, RDI, and
auxiliary RDI bits in the V5 byte (G1 byte for TU-3) with the status of
the received tributary.
- Supports M13 and C-bit parity DS3 formats.
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- Provides High Order Path overhead (J1, B3, C2, G1 bytes) processing
and the corresponding errors and indications.
- T1 transceiver can be configured to support the common DS1 signal
formats (with full SF/ESF support or partial SLC®96 support) or
bypassed (unframed mode).
- Provides in-line DS3/E3 and T1/E1 framers and transmitters for each
data path allowing true bi-directional performance monitoring of
each path.
- Each T1 transceiver:
- Detects the presence of Yellow and AIS patterns.
- Integrates Yellow, Red, and AIS alarms.
- Supports ingress performance monitoring, ESF bit-oriented
codes, HDLC messages on the ESF data link, inband loopback
codes, and PRBS generation/detection.
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- Each E1 transceiver:
- Detects the presence of remote alarm and AIS patterns.
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- Integrates Red and AIS alarms.
- Supports ingress performance monitoring, support for HDLC
messages in the National Use bits, Sa-bit codewords, and V5.2
link ID detection.
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- Contains desynchronizers and jitter attenuators (JATs) that provide
Jitter and Wander compliant E1, T1, DS3, and E3 physical interfaces
without the need for external jitter attenuators.
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- Provides an input and output T1/E1 tributary cross-connect to allow
switching of tributaries between the VT/TU mapper, M13 multiplexer
and SBI TR bus.
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Applications
- Long Haul T1/E1 Line Cards.
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- Short Haul T1/E1Line Cards.
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PM8323 TEMAP 28FDL High Density T1/E1 Framer with Integrated VT/TU Mappers and M13 Mux Product Brief [149 KB] PMC-2052488 
PMC-2050841 PM8323 TEMAP 28FDL 480 FCBGA CAD Symbols and Footprints [267 KB]