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PM8312 TEMUX 32
High-Density 32-Channel T1/E1/J1 Framer with
Integrated VT/TU Mappers & M13 Multiplexer

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Version Issue Date

Product Brief

PDFPM8312 TEMUX 32 High-Density 32-Channel T1/E1/J1 Framer with Integrated VT/TU Mapper & M13 Multiplexer Short Form Data Sheet [155 KB] PMC-2051525 2006-02-14 

Data Sheet

Locked Document, Log In RequiredPDFTEMUX-32 TELECOM STANDARD PRODUCT REGISTER DESCRIPTION [1.87 MB] PMC-2050909 2006-01-16 
Locked Document, Log In RequiredPDFTEMUX-32 TELECOM STANDARD PRODUCT DATA SHEET [1.46 MB] PMC-2050910 2006-01-17 

Application Note

Locked Document, Log In RequiredPDFConfiguring SBI Compatible Devices [551 KB] PMC-2020180 2007-11-20 
Locked Document, Log In RequiredPDFTEMUX 84 / 84E3 / 32 / TEMAP 84 PROGRAMMER'S GUIDE [799 KB] PMC-2010270 2006-06-01 
Locked Document, Log In RequiredPDFKnowledge Base Items for the PM8312 TEMUX 32 [259 kB] PMC-2052170   2005-10-24 

Errata

Locked Document, Log In RequiredPDFTEMUX 32 Device Errata [180 KB] PMC-2052663 2006-02-17 

Software Documentation

Locked Document, Log In RequiredPDFTEMUX-32 TELECOM STANDARD PRODUCT REGISTER DESCRIPTION [1.87 MB] PMC-2050909 2006-01-16 

Software

Locked Document, Log In RequiredPDFPM8316 TEMUX-84/PM5366 TEMAP-84 Device Driver [390 kB] PMC-2011028 Rel 1.1  2003-04-01 

Symbols/Footprints

Locked Document, Log In RequiredPDFPM8312-PI TEMUX 32 324 PBGA CAD Symbols and Footprints [189 KB] PMC-2052239 2005-11-09 

BSDL Files

Locked Document, Log In RequiredPDFBOUNDARY SCAN DESCRIPTION LANGUAGE (BSDL) SOURCE CODE FOR THE PM8312 TEMUX 32 REV. A DEVICE [7 KB] PMC-2061425 2006-05-30 

Symbols/Footprints

  Version Issue Date
Locked Document, Log In RequiredZipped FilePMC-2052239 PM8312-PI TEMUX 32 324 PBGA CAD Symbols and Footprints [189 KB]12005-11-09

Features

GENERAL

  • This monolithic device integrates:
    • 32 T1 framers.
    • 32 E1 framers.
    • One SONET/SDH VT1.5/VT2/TU11/TU12 bit asynchronous or byte
    • synchronous mapper.
    • One full-featured M13 multiplexer with DS3 framer.
    • One SONET/SDH DS3 mapper for terminating DS3-multiplexed T1 streams, SONET/SDH-mapped T1 streams or SONET/SDH-mapped E1 streams.
  • The SPE/STS-1 can be programmed for various T1, E1 or DS3 modes of operation.
  • Supports a wide range of T1, E1 and J1 framing formats.
  • Supports DS3 framing modes such as M23, C-bit parity, and ITU-T Recommendation G.747.
  • Stand-alone unchannelized E3 framer mode (ITU-T Rec. G.751 or G.832) for access to the entire E3 payload.
  • Flexible line-side and system-side interface support:
    • Supports a 19.44-MHz Scaleable Bandwidth Interconnect (SBITM) Interface for high-density line-side device interconnection to PMC-Sierra's T1/E1 line interface products, including the 8-port PM4323 OCTLIU LT and the 32-port PM4329 HDLIU.
    • Provides a 19.44 or 77.76 MHz SONET/SDH Add/Drop Telecom bus interface for seamless connection with PMC-Sierra's SONET/SDH devices.
    • Supports a byte-serial Scaleable Bandwidth Interconnect (SBI) interface at 19.44 MHz or 77.76 MHz for high-density systemside device interconnection to PMC-Sierra's link layer products.
    • Supports 8 Mbit/s H-MVIP system interface for all T1 or E1 links, a separate 8 Mbit/s H-MVIP system interface for all T1/E1 CAS channels, and a separate 8 Mbit/s H-MVIP system interface for all T1 or E1 CCS and V5.1/V5.2 channels.
    • Supports 28 T1 or 21 E1 links in DS3 or SONET/SDH mode and up to 32 T1 or E1 links when using the line-side SBI interface.
    • Supports transparent virtual tributaries when the SBI interface is used with a SONET/SDH mapper.
    • Supports insertion and extraction of arbitrary rate (e.g. fractional DS3) data streams to and from the SBI bus interface.
  • Provides jitter attenuation in the T1/E1 tributary receive and transmit directions.
  • Provides three independent de-jittered T1 or E1 recovered clocks for system timing and redundancy.
  • Provides per-link diagnostic and line loopbacks.
  • Provides PRBS generators and detectors at DS3 and E3 rates, and on each tributary for error testing at T1, E1 and NxDS0 rates as recommended in ITU-T O.151, 0.152.
  • Provides a generic eight-bit microprocessor bus interface for configuration, control and status monitoring.
  • Provides a standard five-signal P1149.1 JTAG test port for boundary scan board test purposes.
  • Feature-rich functional software drivers available with device.

VOLTAGE

  • Low power 1.8 V/3.3 V CMOS technology. All pins are 5 V tolerant.

PACKAGE

  • 324-pin fine pitch PBGA package (23 mm x 23 mm).
  • Supports industrial temperature range (-40 °C to 85 °C) operation.

Applications

  • Wireless Base Station Controllers or Radio Network Controllers
  • Wireless Base Stations or 3G Node Bs
  • Access and Edge Routers
  • Multi-Service Switches
  • Mult-Service Edge Aggregation Equipment
  • Multi-Service Provisioning Platforms
  • Voice and Media Gateways
  • xDSL and FTTx Uplink Cards
 
 
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