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PM7800 PALADIN® 10
Digital Correction Signal Processor

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Version Issue Date

Product Brief

PDFPM7800 PALADIN 10 Digital Correction Signal Processor Short Form Data Sheet [222 KB] PMC-2001613 4  2004-06-14 
PDFPM7800 PALADIN 10 Release 03 ACPCE Firmware Short Form Data Sheet [49 KB] PMC-2010938 2  2003-12-12 

Data Sheet

Locked Document, Log In RequiredPDFPALADIN Family Product Overview [365 KB] PMC-2021998   2003-09-25 

Application Note

Locked Document, Log In RequiredPDFKnowledge Base Items for the PM7800 PALADIN-10 [256 kB] PMC-2020394 1  2002-04-09 

Models

Locked Document, Log In RequiredPDFPALADIN10 [35 kB] 1.01  2001-07-12 

Features

  • Input signal bandwidth up to 10MHz.
  • Output sample rate up to 80MHz.
  • Variable input sample rate.
  • 32-bit complex baseband reference signal input.
  • 32-bit complex baseband or 16-bit IF output.
  • 16-bit microprocessor bus interface for adaptive control processor compensation engine.
  • 16- or 32-bit observation signal input.
  • Digital correction of Analog Quadrature Modulation distortion for practical zero-IF upconversion.
  • Automatic adjustment of corrective parameters in response to changing RMS signal levels.
  • State-of-the-art firmware.
  • Firmware upgradeable to accommodate new features

PACKAGING

  • Industrial temperature range (-40 °C to +85 °C).
  • 304-pin SBGA with a body size of 31mm x 31mm.

Applications

  • Multi-carrier WCDMA, cdmaOne, CDMA2000 1xRTT, and CDMA2000 EV-DO base station transmitters.
 
 
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