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PM5370 WSE 40
SONET/SDH Wideband Cross-Connect

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Version Issue Date

Product Brief

PDFPM5370 WSE 40 SONET/SDH Wideband Cross-Connect Product Brief [212 KB] PMC-2020097 2004-08-17 
PDFPM5389 WSE 20 SONET/SDH Wideband Cross-Connect Short Form Data Sheet [54 KB] PMC-2031810 2004-09-23 

Application Note

Locked Document, Log In RequiredPDFAttaching Passive Heat Sinks to Organic Flip Chip Packages [142 KB] PMC-2020246 2007-05-02 
Locked Document, Log In RequiredPDFOptimizing Pre-emphasis and Receive Equalization for Backplanes [493 kB] PMC-2021098 2002-10-31 

White Papers

Locked Document, Log In RequiredPDFApplication of Message Assisted Protection Switching (MAPS) to APS Architectures [402 KB] PMC-2021902 2003-09-22 

Sales Collateral

Locked Document, Log In RequiredPDFNotice of Change - All FCBGA Packages to be Standardized to the HDBU Substrate Package Outline [695 KB] PMC-2062178 2006-10-19 

Technical Overview

Locked Document, Log In RequiredPDFRASIO 3G for SONET/SDH Backplanes Technology Brief [64 kB] PMC-2030933 2003-05-29 

Features

GENERAL

  • Multi-purpose SONET/SDH VT/TU and SONET/SDH STS/STM cross-connect.
  • With a memory-switch architecture, implements a strictly non-blocking switch that supports a VT/TU level fabric of up to 45 Gbit/s.
  • Supports 18 high-speed Enhanced SONET Serial Interface (ESSI) CML links each independently configurable for STS-48/STM-16 at 2.488 Gbit/s or STS-12/STM-4 at 622.08 Mbit/s operation.
  • Supports 12 low-speed links operating at 51.84 Mbit/s. The frame alignment of the low-speed links is independent of the high-speed links.
  • Supports system frame synchronization using an external frame pulse or ESSI smart frame synchronization using the frame boundary of the receive links.
  • Compensates for differences in frame boundary arrival times between ingress ports using FIFOs and device level software configurable delay registers.
  • Each SONET STS-1 or SDH VC3/VC4-TUG3 may be independently configured as a single unit and/or as a container of VT/TUs. The contents may be switched intact or switched as VT/TUs.
  • Allows each SONET VT Group to be independently configured to carry VT1.5, VT2, VT3, or VT6 tributaries.
  • Allows each SDH TUG2 to be independently configured to carry TU11, TU12, or TU2 tributaries.

SONET/SDH OVERHEAD ACCESSIBILITY

  • Supports extraction of the transport overhead (TOH) from the ingress ports (both high and low-speed) as well as the insertion of transport overhead into the egress ports via low bandwidth two-bit 77.76MHz interfaces.

APS FEATURES

  • Supports a hardware-based Automatic Protection Switching mechanism (MAPS) for centralized link protection control when operating with other PMC-Sierra devices such as PM5369 TUPP 9953.
  • Provides fully automatic protection switching for Class 1 protection services including 1+1 protection, UPSR, SNCP, and static mesh protection services.
  • Provides hardware assists for Class 2 protection services including 1:N protection, BLSR-2/4, MSSPRING-2/4, and dynamic mesh protection schemes.

I/O AND GENERAL

  • All high-speed ingress and egress links are 1.2 V CML and are ELVDScompatible with programmable preemphasis on transmit, equalization on receive, and support for both AC and DC coupled interfaces.
  • Each high-speed link supports SONET/SDH framed or unframed PRBS-23 or PRBS-7 generation and monitoring for off-line link verification.
  • Configured, controlled, and monitored using a generic 32-bit microprocessor interface.
  • Provides a standard 5-signal IEEE 1149.1 JTAG test port for boundary scan test purposes.
  • Implemented in 1.2 V core and 2.5 V I/O 0.13µm CMOS technology. Inputs are 3.3 V tolerant.
  • Packaged in a 672-ball FCBGA, 27 mm x 27mm.

Applications

  • SONET/SDH Add-Drop Multiplexer (ADM).
  • SONET/SDH Digital Cross-connect (DCC).
  • Multi-service Provisioning Platform (MSPP).
  • Multi-service ADM (MS-ADM).
  • Multi-service Switch (MSS).
  • Optical Access Mux.
  • Terminal Multiplexers.
 
 
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