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PM5343 (STXC)
155 Mbit/s SONET/SDH Transport Overhead Transceiver

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Version Issue Date

Product Brief

PDFSTXC Short Form Data Sheet [53 kB] PMC-1931137 6  2001-07-27 

Reference Design

Locked Document, Log In RequiredPDF(SARD) SONET/SDH 155 Mbit/s Add-Drop Multiplexor with Single-mode Optical Interface Reference Design. [5.54 MB] PMC-1951036 2  1996-10-03 

Data Sheet

Locked Document, Log In RequiredPDFSTXC Data Sheet [1.08 MB] PMC-1930303 6  1998-09-30 

Application Note

Locked Document, Log In RequiredPDFKnowledge Base Items for the PM5343 STXC [326 kB] PMC-2020323   2003-10-06 

Features

  • Monolithic, SONET/SDH Transport Overhead Terminating Transceiver for use in STS-1, STS-3, or STM-1 interface applications, operating at serial interface speeds of up to 155.52 Mbit/s.
  • Provides termination for SONET Section and Line, and SDH Regenerator Section and Multiplexer Section transport overhead.
  • Companion to the PM5344 SPTX SONET/SDH Path Terminating Transceiver.
  • Operates in STS-1 and STS-3 bit-serial (PECL/TTL I/O) and byte-serial (TTL I/O) modes. Provides independent control of the transmit and receive operating modes for asymmetrical bandwidth applications.
  • Frames to the STS-1 or STS-3 (STM-1) receive stream and inserts the framing bytes (A1 and A2) and the STS identification bytes (C1) into the transmit stream; descrambles the receive stream and scrambles the transmit stream.
  • Calculates and compares the bit interleaved parity error detection codes (B1 and B2) for the receive stream, and calculates and inserts B1 and B2 in the transmit stream.
  • Accumulates near-end errors (B1 and B2) and far-end errors (Z2) and inserts line Far-End Block Errors (FEBEs) into the Z2 growth byte based on received B2 errors.
  • Extracts and serializes the order wire channels (E1 and E2), the data communication channels (D1-D3 and D4-D12) and the section user channel (F1) from the receive stream, and inserts the corresponding signals into the transmit stream.
  • Extracts and serializes the Automatic Protection Switch (APS) channel (K1, K2) bytes, filtering and extracting them into internal registers. Inserts the APS channel into the transmit stream.
  • Detects Loss Of Signal (LOS), Out Of Frame (OOF), Loss Of Frame (LOF), Far-End Receive Failure (FERF), line Alarm Indication Signal (AIS), and protection switching byte failure alarms.
  • Inserts and extracts a 64- or 16-byte section trace (C1) message using an internal register bank. Detects an unstable section trace message or mismatch with an expected message, and inserts Line AIS upon either of these conditions.
  • Inserts FERF and AIS in the transmit stream.
  • Provides LOS insertion, framing pattern error insertion, and coding violation insertion (B1 and B2) for diagnostic purposes. B1 and B2 errors can also be generated "on-the-fly" using an error insertion mask.
  • Provides a transmit and receive ring control port, allowing alarm and maintenance signal control and status to be passed between mate STXCs for ring-based add/drop multiplexer applications.
  • Low power, +5 V, CMOS technology. Device has PECL- and TTL-compatible inputs and outputs.
  • Available in a 160-pin copper leadframe Plastic Quad Flat Pack (PQFP) package.
  • Supports industrial temperature range (-40 °C to 85 °C) operation.

Applications

  • OC-N to OC-M Multiplexers
  • Add/Drop Multiplexers
  • Terminal Multiplexers
  • Broadband ISDN User-Network Interfaces (UNIs)
 
 
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