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PM5332 SPECTRA 1x2488
Monolithic four channel SONET/SDH Payload Extractor/Aligner

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Version Issue Date

Product Brief

PDFPM5332 SPECTRA-1x2488 Channelized STS-48/STM-16 Framer with Integrated Clock/Data Recovery Short Form Data Sheet [168 kB] PMC-2012217 2001-12-06 

Data Sheet

Locked Document, Log In RequiredPDFSPECTRA 1x2488 ASSP Telecom Standard Product Data Sheet [2.57 MB] PMC-2012682 2006-01-23 

Application Note

Locked Document, Log In RequiredPDFKnowledge Base Items for the PM5332 SPECTRA-1x2488 [298 kB] PMC-2030549   2005-09-22 
Locked Document, Log In RequiredPDFSONET/SDH Bit Error Threshold Monitoring [192 KB] PMC-1950820 2003-10-15 
Locked Document, Log In RequiredPDFPM5332 SPECTRA 1x2488 Hardware Design Guide [788 kB] PMC-2020859 2002-11-12 

Errata

Locked Document, Log In RequiredPDFPM5332 SPECTRA 1x2488 Rev A Device Errata [233 kB] PMC-2021892 2003-02-05 

Software

Locked Document, Log In RequiredPDFPM5332 SPECTRA 1x2488 Device Driver [161 kB] PMC-2022094 alpha 1.0  2002-12-05 

Models

Locked Document, Log In RequiredPDFInput Output Buffer Information Specification (IBIS) Model for the PM5332 SPECTRA-1x2488 [50 kB] PMC-2021680 2002-10-30 

BSDL Files

Text / Binary FilePM5332 SPECTRA-1x2488 Rev A Boundary Scan Description Language (BSDL) [44 kB] PMC-2021822 2002-10-29 

Features

  • 2.5 Gbps SONET/SDH payload extractor/aligner. Supports Transport (Section and Line) and Path overhead termination, STS-1 granularity pointer processing and path alignment
  • Provides support for:
    • A single STS-48(STM-16/AU4-4c/AU4/AU3) or STS-48c (STM-16/AU4-16c), stream
    • Up to 4 independent STS-12 (STM-4/AU4/AU3) or STS-12c (STM-4/AU4-4c) streams
  • Provides integrated clock and data recovery and clock synthesis for OC- 48, and OC-12 applications, allowing direct interface to optical modules.
  • In single STS-48/STM-16 mode, provides a 32-bit 77.76 MHz Add and Drop TelecomBus interface
  • In 4xSTS-12/STM-4 mode, provides four 8-bit 77.76 MHz Add and Drop TelecomBus interfaces.
  • Provides STS-1 time slot interchange support to re-arrange any incoming STS-1 to any outgoing position
  • Maps SONET/SDH payloads to system timing, accommodating plesiochronous timing offsets between the line and system timing references through pointer processing.
  • Frames to the SONET/SDH receive stream, inserts framing bytes and STS-1 identification into the transmit stream, and processes or inserts the transport overhead.
  • Interprets or generates the STS (AU) pointer bytes (H1, H2, H3), extracts or inserts the synchronous payload envelope(s), and processes or inserts the path overhead.
  • Supports Path overhead processing for termination or monitoring of all valid payload configurations
  • DCC ports for all channels in OC-12 mode, or a single DCC port for OC-48 mode.
  • Extracts and filters the APS channel (K1, K2) bytes into internal registers; inserts the APS channel into the transmit stream
  • Supports line loopback from the line side receive stream to the transmit stream and diagnostic loopback from the ADD TelecomBus interface to the Drop TelecomBus interface
  • Provides a standard five signal IEEE 1149.1 JTAG test port for boundary scan board test purposes
  • Provides a generic 16-bit microprocessor bus interface for configuration, control, and status monitoring

POWER AND PACKAGING

  • Low power 1.8 V CMOS core logic with 3.3 V CMOS/TTL compatible digital inputs and digital outputs.
  • Industrial temperature range (-40 °C to +85 °C).
  • 500 pin UBGA package.

Applications

  • Router and Switch Line Cards.
  • SONET/SDH Multiplexers.
  • Multi Service Access Switches.
 
 
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