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PM5310 TBS™
TelecomBus Serializer for 2.5 Gbit/s Interconnect

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Version Issue Date

Product Brief

PDFTBS Short Form Data Sheet [118 kB] PMC-2000329 2000-03-28 

Reference Design

Locked Document, Log In RequiredPDFSPECTRA-4X155 with TBS Reference Design [454 kB] PMC-1991245 2001-06-15 

Data Sheet

Locked Document, Log In RequiredPDFTelecomBus Serializer Telecom Standard Product Data Sheet [1.77 MB] PMC-1991257 2001-11-23 

Application Note

Locked Document, Log In RequiredPDFKnowledge Base Items for the PM5310 TBS [455 kB] PMC-2020316   2004-07-05 
Locked Document, Log In RequiredPDFTBS Power Supply Filtering Guidelines [207 KB] PMC-2012540 2002-12-02 
Locked Document, Log In RequiredPDFCHESS J0/C1 Synchronization and Clock/Frame Pulse Distribution Application Note [415 kB] PMC-2020559 2002-11-21 
Locked Document, Log In RequiredPDF777.6 MHZ LVDS Design Considerations [330 kB] PMC-2000299 2002-03-01 

Errata

Locked Document, Log In RequiredPDFTBS Device Errata [70 KB] PMC-2021842 2004-11-22 
Locked Document, Log In RequiredPDFTBS Device Driver Errata [302 kB] PMC-2021597 2002-10-10 

Software Documentation

Locked Document, Log In RequiredPDFTBS Device Driver Manual [802 kB] PMC-2001251 2001-11-15 

Software

Locked Document, Log In RequiredPDFTBS Device Driver [121 kB] PMC-2001252 rel 1.0  2001-11-27 

Models

Locked Document, Log In RequiredPDFTBS [40 kB] 1.05  2002-10-25 

BSDL Files

Text / Binary FileBoundary Scan Description Language (BSDL) Source Code for the PM5310 TBS Revision D Device [23 KB] PMC-2001337 2001-11-30 

Features

  • Encodes data from the Incoming parallel TelecomBus to a set of four working, a set of four protection, and a set of four auxiliary 777.6 Mbit/s LVDS serial TelecomBus links with extended 8B/10B-based encoding.
  • Decodes data from a set of four working, a set of four protection, or a set of four auxiliary 777.6 MHz LVDS serial links with extended 8B/10B-based encoding to the Outgoing TelecomBus stream.
  • Provides capacity to carry an STS-12/STM-4 stream in each LVDS serial TelecomBus link. Four links can be aggregated to form an STS-48c/STM-16c stream.
  • Provides capacity to carry an STS-12/STM-4 stream in each 8-bit bus of the parallel TelecomBus stream. Four 8-bit buses can be aggregated to carry an STS-48c/STM-16c stream.
  • Provides redundant working, protection and auxiliary transmit LVDS serial TelecomBus streams and redundant receive LVDS serial TelecomBus streams for protection switching purposes.
  • Provides independent time-slot interchange blocks on the Incoming and Outgoing parallel TelecomBus streams to allow arbitrary arrangement of time-slots at STS-1 granularity.
  • Supports redundant working/protection time-space-time switch fabric.
  • Supports through-traffic, drop-traffic and protection switching in UPSR, 2-fibre BLSR and 4-fibre BLSR applications (when used with the PM5372 TSE).
  • Uses extended 8B/10B-based line coding protocol on the serial links to provide transition density guarantee and DC balance and to offer a greater control character vocabulary than the standard 8B/10B protocol.
  • Provides encoding of TelecomBus control signals at the multiplex section termination (MST) point, high-order path termination (HPT) point and low-order path termination (LPT) point.
  • Provides optional PRBS generation for each outgoing LVDS serial TelecomBus data link for off-line link verification.
  • Provides PRBS detection for each 8-bit bus on the Incoming parallel TelecomBus stream.
  • Provides PRBS detection for each incoming LVDS serial TelecomBus stream for off-line link verification.
  • Provides optional PRBS generator for each 8-bit bus on the outgoing parallel TelecomBus stream.
  • Provides in-service link verification by optionally overwriting the B1 and E1 byte of each constituent STS-1/STM-0 with a unique software programmable byte and its complement.
  • Provides pins to coordinate updating of the connection map of the time-slot interchange blocks in the local device, peer PM5310 TBS devices and companion PM5372 TSE devices.
  • Derives all internal timing from a single 77.76 MHz system clock.
  • Provides a generic 16-bit microprocessor bus interface for configuration, control, and status monitoring.
  • Implemented in 1.8/3.3 V 0.18 mm CMOS and packaged in a 352 ball UBGA.
  • Low power consumption of 4.2 W (maximum).

Applications

  • SONET/SDH Cross-connects.
  • SONET/SDH Add-Drop Multiplexors.
  • SONET/SDH Terminal Multiplexors.
  • TelecomBus Serializer.
  • TelecomBus Backplane Driver.
 
 
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