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PM2401-KIT CPRI Reference Design
4-channel 1.2288Gb/s CPRI demonstration platform

Documents

Version Issue Date

Product Brief

Locked Document, Log In RequiredPDFPM2401-KIT PMC-Sierra CPRI Reference Design Short Form Data Sheet [97 KB] PMC-2051128 1  2005-06-07 

Features

  • The PMC-Sierra CPRI reference design provides 4 fully functional serial CPRI interfaces operating at 1.2288 Mbit/s.
  • Provides SerDes, Framing/Mapping, Clock Recovery functions for implementing CPRI compliant links.
  • Can be used for both REC & RE applications.
  • Can be made to support CPRI applications operating at 614.4 Mbit/s and 2457.6 Mbit/s.
  • Provides PLL jitter attenuation circuit for meeting CPRI RE clock recovery requirements.
  • Serial loopback card enables single reference system to simultaneously provide both REC & RE functionality.
  • Windows-based GUI provides access to all hardware functions.
  • Powered by single external power supply.
  • Based on PM2388-KIT Multi Serial Protocol Development System.

HIGH SPEED I/O

  • 2 x PMC-Sierra QuadPHY 10GX (PM8358).
  • Each QuadPHY 10GX provides 4 lanes of 1.2 to 3.2 Gbit/s backplane serial I/O, or 8 lanes of 600 Mbit/s to 1.2 Gbit/s backplane serial I/O.
  • Compliant with both CPRI LV and HV Electrical Requirements.
  • Meets requirements of serial protocol PCS & PMD layers including 8B/10B encoding, byte alignment, symbol align, lane deskew, clock rate compensation.
  • Provides programmable pre-emphasis and programmable equalization.

CPRI FRAMING/MAPPING

  • Implemented in VHDL.
  • Multi-vendor compatibility.
  • Supports 4 standard compliant 1.228.8 Mbit/s CPRI links:
    • Supports CPRI link rate auto negotiation.
    • Provides CPRI framing engine.
    • Provides configurable delay insertion for meeting CPRI delay calibration requirements.
    • Provides interrupts and status for software implementation of CPRI startup state machine.
    • Supports insertion and extraction of L1 inband protocol subchannel.
    • Interprets and generates synchronization control words.
    • Provides HFN generation and extraction.
    • Provides BFN generation and extraction.
    • Provides inband insertion and extraction of vendor specific control words via the system parallel interface.
    • Provides PRBS insertion/monitoring and 2 loopback functions for diagnostic purposes.
  • Double data rate TBI interface for glueless connection to the PM8358 QuadPHY 10GX device.
  • Automatic start-up and rate negotiation.
  • Delay calibration to 4 ns resolution.
  • Provides delay equalization per link using loopback testing and embedded delay measurement.
  • Supports PowerQuicc II compliant HDLC serial interface for slow C&M message insertion and extraction.

INTERFACES

  • 8 serial lanes interface to HM-Zd backplane connector for interfacing to the QuadPHY 10GX.
  • 8-bit parallel interface for system side connection to CPRI Framer/Mapper.
  • System is controlled via a USB interface. An external power supply is required.

SOFTWARE FEATURES

  • System software provides a GUI with support for:
    • Access to registers on the QuadPHY 10GX and the CPRI Framer/Mapper.
    • Automated configuration of the reference board to standard operating modes.
    • Automated user-defined configuration of all devices using TCL scripts.
    • Low level read/write access to devices via GUI.

PM2401-KIT CONTENTS

  • Board schematics.
  • System specification.
  • Gerber files.

APPLICATIONS

  • CPRI compliant wireless base station design supporting 2.5G, 3G, WiMax air interfaces.
  • Remote Radio Head deployment for distributed base station architectures.

 
 
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