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MSP8110
Multi-Service Processor
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Features
GENERAL
PMC-Sierra's MSP8110 Multi-Service Processor is designed to meet the needs of networking appliance, network attached storage applications and embedded systems.
The MSP8110 is part of the MSP8100 Series of highly-integrated, feature-rich products that incorporate the high performance, power efficient MIPS 34K core. The processor provides PCI, dual Ethernet, ROM, Flash, DDR, and low-speed peripheral interfaces, which are connected internally to the MIPS 34K core by a high-bandwidth multiservice bus.
BENEFITS
- High-performance 400 MHz MIPS32 core enables demanding
packet processing and network security applications
- Highly integrated system-on-a-chip (SoC) solution simplifies board
design, reducing component and overall system cost
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- Optimized memory controller provides low latency, high bandwith
access to SDRAM (333 MHz DDR-2)
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MIPS 34K MICROPROCESSOR CORE
- Supports MIPS32 Release 2 instruction set
- 400 MHz operation
- 9-stage pipeline
- 64 Kbyte Instruction and Data caches
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- MIPS16e Code Compression
- 32-bit address paths, 64-bit data paths to caches and external
interface
- DSP instruction set extensions
- EJTAG debug and off-chip trace support
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PROGRAMMABLE MEMORY MANAGEMENT UNIT
- 8-entry Instruction TLB (ITLB) and Data TLB (DTLB)
- 32 dual-entry Joint TLB (JTLB)
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- JTLBs are sharable under software control
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USB 2.0 CONTROLLER AND PHY
- Both host and device mode of operation
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- Supports low-speed (LS) operation (1.5 Mbit/s), full-speed (FS)
operation (12 Mbit/s) and hi-speed (HS) operation (480 Mbit/s)
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SYSTEM INTERRUPT CONTROLLER
- Handles interrupts for on-chip peripherals and 8 external interrupts
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- Supports up to 32 PCI message signaled interrupts (MSI)
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HIGH PERFORMANCE MULTI-SERVICE BUS (MS BUS)
ARCHITECTURE
- 32 bits at 166 MHz (5.33 Gbit/s)
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- DMA engines integrated for the Ethernet MACs, USB, TDM interface,
security engine, and block copy engine
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SYSTEM LOGIC AND PERIPHERALS MODULE
- 3.3 V PCI Local Bus 2.3-compliant host interface
- Configurable external Local Bus interface that supports data
transfers up to 25 Mbytes per second
- Glueless interface to x8 Flash memories
- Clock manager and boot controller
- Serial Peripheral Interface/ Microprocessor Peripheral Interface
(SPI/MPI)
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- Two-Wire serial interface
- 20 GPIO pins
- System interrupt controller (internal and external interrupts)
- Two external timers / clock generator
- Two universal asynchronous serial (UART) interfaces
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CLOCK MANAGER AND BOOT CONTROLLER
- In single crystal mode, all on-chip clocks are generated from a single
36 MHz crystal
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ETHERNET INTERFACE
- Two independent 10/100 Ethernet MAC controllers
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- User selectable Media-Independent Interface (MII) or RMII (Reduced
MII) Interface on each MAC
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APPLICATIONS
- Networking applications
- Security appliances
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PM2429-KIT Bryce Reference Kit Product Brief [225 KB] PMC-2070525