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HPFC-6600/6640
Tachyon QE4 High Performance Fibre Channel Controller

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Version Issue Date

Product Brief

PDFHPFC-6600/6640 Tachyon QE4 Quad-Channel 4 Gb Enhanced Fibre Channel PCI-Express Controller With T10 DIF Product Brief [178 KB] PMC-2060420 2006-09-13 

Application Note

Locked Document, Log In RequiredPDFAttaching Passive Heat Sinks to Organic Flip Chip Packages [142 KB] PMC-2020246 2007-05-02 
Locked Document, Log In RequiredPDFMulti-DMA Application Note [72 KB] PMC-2060731 2006-04-03 

Product Overview

The Tachyon QE4 device (HPFC-66xx Series) is a high-performance 4- port 4 Gbit/s Fibre Channel controller. It features an 8-lane, native PCI Express bus, enabling full-duplex operation. QE4 is an integrated single chip solution ideal for a variety of high-performance I/O applications.

The Tachyon proven State-Machine architecture scales directly with system CPU performance and is not limited by the constraints of an embedded microprocessor. QE4 supports up to 4 processors per FC link using 4 independent register and API queue structures. This feature allows systems to scale to required performance as necessary while maintaining compatibility with the Tachyon programming model at the register level, and with the TSDK (Tachyon Software Development Kit) API tools.

QE4 supports the T-10 Standard Protection Information via ADIF (Advanced Data Integrity Field) which ensures end to end data checking/integrity across the storage domain. ADIF provides robust CRC-based data protection with mechanisms to initiate, extend, verify and replace, or terminate a protection domain.

QE4 offers additional performance by providing advanced framehandling functions that are normally handled by the host processor. These additional enhancements make it possible for the system to utilize intelligent frame handling while reducing CPU utilization.

Features

  • 4-port 4/2/1 Gbit/s Fibre Channel controller
  • TWI control and presence detect for optical transceivers
  • Multi DMA for cache mirroring
  • CRC offload engine for enabling non-DIF compliant solutions
  • Enhanced TRE for higher performance on small transfers (IOPS)
  • ERQ/SCSI LL priority control for additional Quality of Service control
  • Support for up to 4 v processors per FC Link
  • Fibre Channel auto-speed negotiation
  • PCI Express 8-lane 2.5 GHz Host Interface
  • Supports 10Km distance per link at 4G link rate with internal memory
  • Full duplex operation for each port
  • Advanced Data Integrity Field protection (ADIF)
  • Virtualization support with H/W assisted FC Frame Steering
  • Pin compatible with Tachyon predecessor QX4 64xx series
  • SCSI BiDi command assist
  • Industry-leading technical support and documentation
  • Software development API tools for Linux, and Windows.
  • Standard and RoHS compliant packages

DATA INTEGRITY FEATURES

  • DIF provides a mechanism for initiating, extending and terminating robust data protection domains
  • Standard Fibre Channel CRC support
  • Data Integrity Features
  • Full byte-level parity protection on data path

TACHYON EXPRESSWAY ARCHITECTURE

  • Provides an interface from the Fibre Channel core to PCI Express
  • Allows simultaneous operation on each of the four 4 Gb ports

PRELIMINARY SPECIFICATIONS

  • Package Type: FC PBGA, 1mm ball pitch
  • Power Dissipation . 5 Watts
  • Thermal Specification: 0 - 110°C, TJunction
  • Voltage Margin: ±5%

MAINTAIN TACHYON FIBRE CHANNEL FAMILY PROGRAMMING MODEL (SIMILAR TO THE QX2 DEVICE)

  • Registers memory mapped
  • Backward compatible offsets for Fibre Channel core registers

STANDARD TACHYON FIBRE CHANNEL CORE FEATURE SET

  • Performance scalable State Machine-based architecture
  • Independent, concurrent inbound/outbound transaction processing
  • Multiple outbound context support
  • Support for SCSI initiator, target and initiator/target modes
  • Complete sequence segmentation and reassembly done in hardware
  • Up to 2048-byte frame payloads
  • Fully assisted FC-FS Class 2 and Class 3 support
  • ACK0/ACK1 models in hardware
  • Interrupt avoidance mechanisms
  • Standard Tachyon Fibre Channel Core Feature Set
  • 64-bit addressing (44/45 bits per Length/Address pair)

Applications

  • Embedded subsystems
  • Disk Arrays
  • Multi-protocol Bridges/Routers
  • Intelligent Switches
  • Virtualization Devices
 
 
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